LVPECL

2

2

Reference

Generator

GND

OUTP[3,2]

OUTN[3,2]

LVPECL

2

2

OUTP[1,0]

OUTN[1,0]

V

CC

V

AC_REF

INP0

INN0

INP1

INN1

CDCLVP2102

www.ti.com

SCAS881C – AUGUST 2009 – REVISED JANUARY 2016

8 Detailed Description

8.1 Overview

The CDCLVP2102 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are

required to ensure correct operation of the device and to minimize signal integrity. The proper termination for

LVPECL outputs is a 50

Ω to (VCC – 2) V, but this direct-coupled (DC) voltage is not readily available on PCB.

Therefore, a Thevenin equivalent circuit is worked out for the LVPECL termination in both DC- and AC-coupled

configurations. These configurations are shown in Figure 12 (a and b) for VCC = 2.5 V and Figure 13 (a and b) for

VCC = 3.3 V, respectively. TI recommends placing all resistive components close to either the driver end or the

receiver end. If the supply voltage for the driver and receiver is different, AC coupling is required.

8.2 Functional Block Diagram

8.3 Feature Description

The CDCLVP2102 is a low-additive jitter universal to LVPECL fan-out buffer with two independent inputs. The

small package, low output skew, and low-additive jitter make for a flexible device in demanding applications.

8.4 Device Functional Modes

The two independent inputs of the CDCLVP2102 distribute the input clock to two outputs each. Unused inputs

and outputs can be left floating to reduce overall component cost. Both AC- and DC coupling schemes can be

used with the CDCLVP1204 to provide greater system flexibility.

8.4.1 LVPECL Output Termination

The CDCLVP2102 is an open emitter for LVPECL outputs. Therefore, proper biasing and termination are

required to ensure correct operation of the device and to minimize signal integrity. The proper termination for

LVPECL outputs is a 50

Ω to (VCC –2) V, but this DC voltage is not readily available on PCB. Therefore, a

Thevenin equivalent circuit is worked out for the LVPECL termination in both DC- and AC-coupled configurations.

These configurations are shown in Figure 12 a and b for VCC = 2.5 V and Figure 13 a and b for VCC = 3.3 V,

respectively. TI recommends placing all resistive components close to either the driver end or the receiver end. If

the supply voltage for the driver and receiver is different, AC coupling is required.

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