V

IH +

V

IL

2

V

th =

CDCLVD2108

Z = 50 W

LVCMOS

(2.5V)

RS

CDCLVD2108

www.ti.com

SCAS905C – OCTOBER 2010 – REVISED DECEMBER 2010

Figure 18. 2.5V LVCMOS Clock Driver Connected to CDCLVD2108 Input

If one of the input buffers is used, the other buffer should be disabled through the EN pin, and unused input pins

should be grounded by 1 k

Ω resistors.

REVISION HISTORY

Changes from Original (October 2010) to Revision A

Page

•

Feature - Low Within Bank Output Skew of 45 ps (Max) To: Low Within Bank Output Skew of 50 ps (Max) ..................... 1

•

Changed tSK, O_WB Within bank output skew From: 45 ps (Max) To: 50 ps (Max) ................................................................ 5

•

Changed tSK, O_WB Bank-to-bank output skew From: 100 ps (Max) To: 80 ps (Max) ............................................................ 5

•

Deleted the Recommended PCB Layout illustration .......................................................................................................... 10

Changes from Revision A (November 2010) to Revision B

Page

•

Changed the ICC100, Supply current Typ value From: 97 To: 119 mA .................................................................................. 5

•

Changed the ICC800, Supply current Typ value From: 138 To: 168 mA ................................................................................ 5

Changes from Revision B (December 2010) to Revision C

Page

•

Changed the device status From: Product Preview To: Production ..................................................................................... 1

Copyright © 2010, Texas Instruments Incorporated

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Product Folder Link(s): CDCLVD2108