SC16C852LIB datasheet(13/63 Pages) NXP

13 / 63 page

SC16C852L_3

Product data sheet

Rev. 03 — 18 January 2008

13 of 63

NXP Semiconductors

SC16C852L

1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder

6.3 Internal registers

The SC16C852L provides two sets of internal registers (A and B) consisting of

25 registers each for monitoring and controlling the functions of each channel of the

UART. These registers are shown in Table 5.

[1]

These registers are accessible only when LCR[7] is a logic 0.

[2]

These registers are accessible only when LCR[7] is a logic 1.

[3]

Second special registers are accessible only when EFCR[0] = 1.

[4]

Enhanced feature registers are only accessible when LCR = 0xBF.

[5]

First extra feature registers are only accessible when EFCR[2:1] = 01b.

[6]

Second extra feature registers are only accessible when EFCR[2:1] = 10b.

Table 5.

Internal registers decoding

Read mode

Write mode

General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LCR/LSR, SPR)[1]

Receive Holding Register

Transmit Holding Register

Interrupt Enable Register

Interrupt Status Register

FIFO Control Register

Line Control Register

Modem Control Register

Line Status Register

Extra Feature Control Register (EFCR)

Modem Status Register

n/a

Scratchpad Register

Baud rate register set (DLL/DLM)[2]

LSB of Divisor Latch

MSB of Divisor Latch

Second special register set (TXLVLCNT/RXLVLCNT)[3]

Transmit FIFO Level Count

n/a

Receive FIFO Level Count

n/a

Enhanced feature register set (EFR, Xon1/Xon2, Xoff1/Xoff2)[4]

Enhanced Feature Register

Xon1 word

Xon2 word

Xoff1 word

Xoff2 word

First extra feature register set (TXINTLVL/RXINTLVL, FLWCNTH/FLWCNTL)[5]

Transmit FIFO Interrupt Level

Receive FIFO Interrupt Level

Flow Control Count High

Flow Control Count Low

Second extra feature register set (CLKPRES, RS485TIME, AFCR2, AFCR1)[6]

Clock Prescaler

RS-485 turn-around Timer

Additional Feature Control Register 2 Additional Feature Control Register 2

Additional Feature Control Register 1 Additional Feature Control Register 1

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