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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L9300 датащи(PDF) 139 Page - STMicroelectronics |
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L9300 датащи(HTML) 139 Page - STMicroelectronics |
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139 / 178 page  CONFIGURATION CONFIGURATION 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Address: Channel_X_BaseAddress + 0x01 Type: RW Reset: 0b0000 0000 0000 0000 0011 Description: Configuration Register packs information related to the channel configuration. Configuration register can be written only when channel is disabled (ENCHx = 0) or TRISTATED (DRVENAx = 0). [19:16] unused [15] SYNC TYPE: 0: Dither synchronization done at each dither step 1: Dither synchronization done at each dither period Reset events: VB_UV, GND_LOSS, POR, RES1 [14] OFS_CMP_DIS: 0: Current Sense Offset Compensation active 1: Current Sense Offset Compensation disabled Reset events: VB_UV, GND_LOSS, POR, RES1 [13] CALIBRATION_DIS: 0: Digital current sense calibration active 1: Digital current sense calibration disabled Reset events: VB_UV, GND_LOSS, POR, RES1 [12] DITHER_SYNC_EN: 0: Dither PWM synchronization disabled 1: Dither PWM synchronization enabled Reset events: VB_UV, GND_LOSS, POR, RES1 [11] Solenoid Current Feedback A/D Self Test: 0: Self Test disabled 1: Self Test enabled Reset events: VB_UV, GND_LOSS, POR, RES1 L9300 SPI interface and register mapping DS12258 - Rev 5 page 139/178 |
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