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L5963 датащи(PDF) 5 Page - STMicroelectronics |
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L5963 датащи(HTML) 5 Page - STMicroelectronics |
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5 / 49 page ![]() DocID028553 Rev 3 5/49 L5963 List of figures 5 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. Example of a typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. Example of usage of two regulators in the same application . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. PowerSSO-36 pinout configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. VQFPN-48 pinout configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Figure 6. PSRR LDO 50 mA load vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7. Efficiency vs. output current (VIN = 14 V, fsw = 2 MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8. Efficiency vs. output current (VIN = 14 V, fsw = 250 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9. Low voltage warning monitor & delay schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 10. Linear regulator diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 11. Enable timing for standby regulator (ENLDO pin connect to supply directly) . . . . . . . . . . . 22 Figure 12. Enable timing for linear regulator (pin ENLDO isn't connected to VINLDO) . . . . . . . . . . . . 23 Figure 13. Switching regulators diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 14. Closed loop system with TYPE III network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 15. TYPE III compensated network diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 16. PowerSSO-36 (exposed pad) package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 17. PowerSSO-36 (slug-up) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 18. VFQFPN-48 (7x7x1.0 - opt. D) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 19. PowerSSO-36 (exp. pad) marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 20. PowerSSO-36 (slug up) marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 21. VFQFPN-48 (7x7x1.0) marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 |
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