DS8714 Rev 3

11/19

L4989D, L4989MD

Application information

18

3

Application information

3.1

Voltage regulator

The voltage regulator uses a p-channel MOS transistor as a regulating element. With this

structure a very low dropout voltage at current up to 150 mA is obtained. The output voltage

is regulated up to transient input supply voltage of 40 V. No functional interruption due to

over-voltage pulses is generated.The voltage Regulator is always active and not depending

on the state of WEn input pin. A short circuit protection to GND is provided.

Figure 3. Behavior of output current versus regulated voltage Vo

3.2

Reset

The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with

the internal reference voltage and a resistor output divider. If the output voltage becomes

lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is

guaranteed for an output voltage Vo greater than 1 V.

When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.

This delay is obtained by an internal oscillator.

The oscillator period is given by:

Tosc = [(Vrhth - Vrlth) x Ctr] / Icr + [(Vrhth - Vrlth) x Ctr] / Idr

where:

Icr:

is an internally generated charge current

Idr:

is an internally generated discharge current

Vrhth, Vrlth:

are two voltages defined with the output voltage and a resistor output



divider

Ctr:

is an external capacitance.

trd is given by:

trd = 512 x Tosc

The Reset is always active and not depending on the state of WEn input pin.

Vo

Vo_ref

Iout

Ishort Ilim