L9954TR datasheet(26/37 Pages) STMICROELECTRONICS

26 / 37 page

Functional description of the SPI

L9954 / L9954XP

26/37

Doc ID 14279 Rev 4

OUT6 – HS

on/off

If a bit is set the selected

output driver is switched

on. If the corresponding

PWM enable bit is set

(Input Register 1) the

driver is only activated if

PWM1 (PWM2) input

signal is high. The outputs

of OUT1-OUT3 are half

bridges. If the bits of HS-

and LS-driver of the same

half bridge are set, the

internal logic prevents that

both drivers of this output

stage can be switched on

simultaneously in order to

avoid a high internal

current from VS to GND.

OUT6 – HS

over-current

In case of an over-current

event the corresponding status

bit is set and the output driver

is disabled. If the over-current

Recovery Enable bit is set

(Input Register 1) the output

will be automatically

reactivated after a delay time

resulting in a PWM modulated

current with a programmable

duty cycle (Bit 21).

If the over-current recovery bit

is not set the microcontroller

has to clear the over-current

bit (Reset Bit) to reactivate the

output driver.

x (don’t care)

OUT5 – HS

on/off

OUT5 – HS

over-current

OUT4 – HS

on/off

OUT4 – HS

over-current

x (don’t care)

OUT3 – HS

on/off

OUT3 – HS

over-current

OUT3 – LS

on/off

OUT3 – LS

over-current

OUT2 – HS

on/off

OUT2 – HS

over-current

OUT2 – LS

on/off

OUT2 – LS

over-current

OUT1 – HS

on/off

OUT1 – HS

over-current

OUT1 – LS

on/off

OUT1 – LS

over-current

No error bit

A logical NOR-combination of

all bits 1 to 22 in both status

registers.

Table 18.

SPI - input data and status registers 0 (continued)

Bit

Input register 0 (write)

Status register 0 (read)

Name

Comment

Name

Comment

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