3.0 mm

(min)

0.7 mm

(typ)

0.3 mm

(typ)

CDCLVC1310

SCAS917E – JULY 2011 – REVISED JANUARY 2014

www.ti.com

Thermal Management

Power consumption of the CDCLVC1310 can be high enough to require attention to thermal management. For

reliability and performance reasons, limit the die temperature to a maximum of 125°C. That is, as an estimate, TA

(ambient temperature) plus device power consumption times

θJA should not exceed 125°C.

The device package has an exposed pad that provides the primary heat removal path as well as an electrical

grounding to the printed circuit board (PCB). To maximize the removal of heat from the package, incorporate a

thermal landing pattern including multiple vias to a ground plane on the PCB within the footprint of the package.

Solder the exposed pad down to ensure adequate heat conduction out of the package. Figure 23 shows a

recommended land and via pattern.

Figure 23. Recommended PCB Layout for CDCLVC1310

20

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