STA559BW datasheet(24/67 Pages) STMICROELECTRONICS

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STA559BW

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DocID18190 Rev 3

This bit sets the behavior of the IC after a thermal warning disappears. If TWRB is enabled

the device automatically restores the normal gain and output limiting is no longer active. If it

is disabled the device keeps the output limit active until a reset is asserted or until TWRB set

to 0. This bit works in conjunction with TWAB

Thermal warning adjustment bypass

Bit TWAB enables automatic output limiting when a power stage thermal warning condition

persists for longer than 400ms. When the feature is active (TWAB = 0) the desired output

limiting, set through bit TWOCL (-3 dB by default) at address 0x37 in the RAM coefficients

bank, is applied. The way the limiting acts after the warning condition disappears is

controlled by bit TWRB.

Fault detect recovery bypass

The on-chip power block provides feedback to the digital controller which is used to indicate

a fault condition (either overcurrent or thermal). When fault is asserted the power control

block attempts a recovery from the fault by asserting the 3-state output, holding it for period

of time in the range of 0.1 ms to 1 second, as defined by the fault-detect recovery constant

sequence is repeated as long as the fault indication exists. This feature is enabled by

default but can be bypassed by setting the FDRB control bit to 1. The fault condition is also

asserted by a low-state pulse of the normally high INT_LINE output pin.

6.1.2

Configuration register B (addr 0x01)

Table 14. Thermal warning adjustment bypass

Bit

R/W

RST

Name

Description

6R/W

TWAB

0: thermal warning adjustment enabled

1: thermal warning adjustment disabled

Table 15. Fault detect recovery bypass

Bit

R/W

RST

Name

Description

R/W

FDRB

0: fault detect recovery enabled

1: fault detect recovery disabled

C2IM

C1IM

DSCKE

SAIFB

SAI3

SAI2

SAI1

SAI0

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