AMC1200, AMC1200B

SBAS542D – APRIL 2011 – REVISED JULY 2015

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Feature Description (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

PD

Pollution degree

2

°

7.3.2 IEC 61000-4-5 Ratings

PARAMETER

TEST CONDITIONS

VALUE

UNIT

VIOSM

Surge immunity

1.2-

μs/50-μs voltage surge and 8-μs/20-μs current surge

±6000

V

7.3.3 IEC 60664-1 Ratings(1)

PARAMETER

TEST CONDITIONS

SPECIFICATION

Basic isolation group

Material group

II

Rated mains voltage

≤ 150 VRMS

I-IV

Rated mains voltage

≤ 300 VRMS

I-IV

Installation classification

Rated mains voltage

≤ 400 VRMS

I-III

Rated mains voltage < 600 VRMS

I-III

(1)

Over operating free-air temperature range (unless otherwise noted).

7.3.4 Package Characteristics(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DWV package

8

mm

Shortest terminal to terminal

L(I01)

Minimum air gap (clearance)

distance through air

DUB package

7

mm

Shortest terminal to terminal

DWV package

8

mm

Minimum external tracking

L(I02)

distance across the package

(creepage)

DUB package

7

mm

surface

Tracking resistance

CTI

DIN IEC 60112/VDE 0303 part 1

≥ 400

V

(comparative tracking index)

Minimum internal gap

Distance through the insulation

0.014

mm

(internal clearance)

Input to output, VIO = 500 V, all pins on each side of

the barrier tied together to create a two-terminal

> 1012

Ω

device, TA < 85°C

RIO

Isolation resistance

Input to output, VIO = 500 V,

> 1011

Ω

85°C

≤ TA < TA max

Barrier capacitance input to

CIO

VI = 0.5 VPP at 1 MHz

1.2

pF

output

CI

Input capacitance to ground

VI = 0.5 VPP at 1 MHz

3

pF

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of a specific

application. Take care to maintain the creepage and clearance distance of the board design to ensure that the mounting pads of the

isolator on the printed-circuit-board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal according to

the measurement techniques shown in the TI Isolation Glossary. Techniques such as inserting grooves and/or ribs on the PCB are used

to help increase these specifications.

7.3.5 IEC Safety Limiting Values

Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O)

circuitry. A failure of the I/O circuitry can allow low resistance to ground or the supply and, without current

limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to

secondary system failures.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IS

Safety input, output, or supply current

θJA = 246°C/W, VIN = 5.5 V, TJ = 150°C, TA = 25°C

10

mA

TC

Maximum case temperature

150

°C

12

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