TIMING CHARACTERISTICS

(1)

ADS5463

ADS54RF63

SLAS515E – NOVEMBER 2006 – REVISED JULY 2009 ................................................................................................................................................... www.ti.com

Typical values at TA = 25°C, minimum and maximum values over full temperature range TMIN = –40°C to TMAX = 85°C,

sampling rate = maximum rated, 50% clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V, and 3-VPP differential

clock (unless otherwise noted)

ADS54RF63

ADS5463

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

ta

Aperture delay

200

200

ps

Aperture jitter, rms

150

150

fs

Latency

3.5

3.5

cycles

tCLK

Clock period

1.8181

50

2

50

ns

tCLKH

Clock pulse duration, high

0.727

0.8

ns

Assumes min 40%

duty cycle

tCLKL

Clock pulse duration, low

0.727

0.8

ns

tDRY

CLK to DRY delay(2)

Zero crossing

1350

1750

950

1600

ps

CLK to DATA/OVR

tDATA

Zero crossing

1100

2000

750

2100

ps

delay(2)

tSKEW

DATA to DRY skew

tDATA – tDRY

–250

0

250

–350

0

650

ps

tRISE

DRY/DATA/OVR rise time

500

500

ps

tFALL

DRY/DATA/OVR fall time

500

500

ps

(1)

Timing parameters are specified by design or characterization, but not production tested. <10pF load on each output pin.

(2)

DRY, DATA, and OVR are updated on the falling edge of CLK. The latency must be added to tDATA to determine the overall propagation

delay.

10

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