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TMS320DM647 датащи(PDF) 121 Page - Texas Instruments |
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TMS320DM647 датащи(HTML) 121 Page - Texas Instruments |
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121 / 167 page ![]() www.ti.com HCS HAS HCNTL[1:0] HR/W HHWIL HSTROBE HD[15:0] HRDY 16 15 37 13 14 16 15 37 13 3 1 2 3 1 2 38 7 4 6 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372A – MAY 2007 – REVISED JUNE 2007 A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320DM647/DM648 DSP Host Port Interface (HPI) User's Guide (literature number SPRUEL5) . Figure 6-31. HPI16 Read Timing (HAS Not Used, Tied High) Submit Documentation Feedback Peripheral Information and Electrical Specifications 121 |
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