VDD and VDDA

VOFFSET

VRESET

DMD_EN_ARSTZ

VBIAS

Note F

Note A

Note D

tDELAY1

Note B

ûV < Specification

Note C

ûV < Specification

VSS

VSS

VSS

VSS

VSS

Note H

Note I

tDELAY3

Note G

...

...

...

...

...

Time

Note E

tDELAY2

A.

See Section 4 for the Pin Functions Table.

B.

To prevent excess current, the supply voltage difference |VOFFSET – VBIAS| must be less than the specified limit in the Section 5.4.

C.

To prevent excess current, the supply difference |VBIAS – VRESET| must be less than the specified limit in Section 5.4.

D.

VBIAS should power up after VOFFSET has powered up, per the Delay1 specification.

E.

DLP controller software initiates the global VBIAS command.

F.

After the DMD micromirror park sequence is complete, the DLP controller software initiates a hardware power-down that activates

DMD_EN_ARSTZ and disables VBIAS, VRESET, and VOFFSET.

G.

Under power-loss conditions where emergency DMD micromirror park procedures are being enacted by the DLP controller hardware,

DMD_EN_ARSTZ will go low.

H.

VDD must remain high until after VOFFSET, VBIAS, VRESET go low, per Delay2 specification.

I.

To prevent excess current, the supply voltage delta |VDDA – VDD| must be less than the specified limit in Section 5.4.

Figure 8-1. DMD Power Supply Requirements

DLP391TP

DLPS289A – JUNE 2025 – REVISED SEPTEMBER 2025

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