STM32G030C6 datasheet(73/94 Pages) STMICROELECTRONICS

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DS12991 Rev 1

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STM32G030x6/x8

Electrical characteristics

5.3.21

Characteristics of communication interfaces

I2C-bus interface characteristics

The I2C-bus interface meets timing requirements of the I2C-bus specification and user

manual rev. 03 for:

•

Standard-mode (Sm): with a bit rate up to 100 kbit/s

•

Fast-mode (Fm): with a bit rate up to 400 kbit/s

•

Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s.

The timings are guaranteed by design as long as the I2C peripheral is properly configured

(refer to the reference manual RM0454) and when the I2CCLK frequency is greater than the

minimum shown in the following table.

The SDA and SCL I/O requirements are met with the following restrictions: the SDA and

SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS

connected between the I/O pin and VDDIO1 is disabled, but is still present. Only FT_f I/O pins

support Fm+ low-level output current maximum requirement. Refer to Section 5.3.14: I/O

port characteristics for the I2C I/Os characteristics.

Table 61. IWDG min/max timeout period at 32 kHz LSI clock(1)

Prescaler divider

PR[2:0] bits

Min timeout RL[11:0]= 0x000

Max timeout RL[11:0]= 0xFFF

Unit

0.125

512

0.250

1024

/16

0.500

2048

/32

1.0

4096

/64

2.0

8192

/128

4.0

16384

/256

6 or 7

8.0

32768

1. The exact timings further depend on the phase of the APB interface clock versus the LSI clock, which causes an

uncertainty of one RC period.

Table 62. Minimum I2CCLK frequency

Symbol

Parameter

Condition

Typ

Unit

fI2CCLK(min)

Minimum I2CCLK

frequency for correct

operation of I2C

peripheral

Standard-mode

MHz

Fast-mode

Analog filter enabled

DNF = 0

Analog filter disabled

DNF = 1

Fast-mode

Plus

Analog filter enabled

DNF = 0

Analog filter disabled

DNF = 1

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