CDx4HC(T)245 High-Speed CMOS Logic Octal-Bus Transceiver, Three-State, Non-

Inverting

1 Features

• Buffered inputs

• Three-state outputs

• Bus line driving capability

• Typical propagation delay (A to B, B to A) 9ns at

VCC = 5V, CL = 15pF, TA = 25°C

• Fanout (over temperature range)

– Bus driver outputs :15 LSTTL loads

• Wide operating temperature range : -55°C to

125°C

• Balanced propagation delay and transition times

• Significant power reduction compared to LSTTL

logic ICs

• HC types

– 2 V to 6 V Operation

– High Noise Immunity: NIL = 30%, NIH = 30% of

VCC at VCC = 5 V

• HCT types

– 4.5 V to 5.5 V operation

– Direct LSTTL input logic compatibility, VIL= 0.8

V (Max), VIH = 2 V (Min)

– CMOS input compatibility, Il ≤ 1µA at VOL, VOH

2 Description

The CDx4HC(T)245 is an octal bus transceiver with

3-state outputs. All eight channels are controlled by

the direction (DIR) pin and output enable (OE) pin.

Device Information

PART NUMBER

PACKAGE

(1)

BODY SIZE (NOM)

CD54HC245F

J (CDIP, 20)

26.92 mm × 6.92 mm

CD74HC245

N (PDIP, 20)

25.40 mm × 6.35 mm

DW (SOIC, 20) 12.80 mm × 7.50 mm

CD54HCT245F

J (CDIP, 20)

26.92 mm × 6.92 mm

CD74HCT245

N (PDIP, 20)

25.40 mm × 6.35 mm

DW (SOIC, 20) 12.80 mm × 7.50 mm

(1)

For all packages see the orderable addendum at the end of

the data sheet.

Functional Block Diagram

CD54HC245, CD74HC245, CD54HCT245, CD74HCT245

SCHS119B – NOVEMBER 1998 – REVISED JULY 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.