7 Detailed Description

7.1 Overview

The CDx4HC243 and CDx4HCT243 silicon-gate CMOS three-state bidirectional noninverting buffers are

intended for two-way asynchronous communication between data buses. They have high-drive-current outputs

that enable high-speed operation when driving large bus capacitances. These circuits possess the low power

dissipation of CMOS circuits and have speeds comparable to low-power Schottky TTL circuits. They can drive

15 LSTTL loads.

The states of the output-enable (OEB, OEA) inputs determine both the direction of flow (A to B, B to A), and the

three-state mode.

7.2 Functional Block Diagram

Ax

Bx

OEB

OEA

1 of 4 Channels

Figure 7-1. Functional Diagram

7.3 Device Functional Modes

Table 7-1. Truth Table

(1)(2)

Control Inputs

HC, HCT243 Series

Data port status

OEB

OEA

An

Bn

H

H

O

I

L

H

Z

Z

H

L

Z

Z

L

L

I

O

(1)

H = High voltage level. L = Low voltage level. I = Input. O =

Output (Same level as input). Z = High Impedance

(2)

To prevent excess currents in the High Z modes all I/O terminals

hsould be terminated with 10kΩ to 1MΩ resistors.

CD54HC243, CD74HC243, CD54HCT243, CD74HCT243

SCHS168E – NOVEMBER 1998 – REVISED MARCH 2022

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