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SN74AXC2T45 датащи(PDF) 21 Page - Texas Instruments |
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SN74AXC2T45 датащи(HTML) 21 Page - Texas Instruments |
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21 / 32 page ![]() 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The SN74AXC2T45-Q1 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The SN74AXC2T45-Q1 device is ideal for use in applications where a push-pull driver is connected to the data I/Os. The maximum data rate can be up to 380Mbps when device translates a signal from 1.8V to 3.3V. Figure 8-1 shows one example application where the SN74AXC2T45-Q1 device is used to translate low voltage error signals from a CPU to a higher voltage signal to properly drive the inputs of a system controller, thus alerting the system of any CPU errors such as overheating or other catastrophic processor errors. 8.1.1 Enable Times Calculate the enable times for the SN74AXC2T45-Q1 using the following formulas: tA_en (DIR to A) = tdis (DIR to B) + tpd (B to A) (1) tB_en (DIR to A) = tdis (DIR to A) + tpd (A to B) (2) In a bidirectional application, these enable times provide the maximum delay time from the time the DIR bit is switched until an output is expected. For example, if the SN74AXC2T45-Q1 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled (tdis) before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay (tpd). To avoid bus contention care should be taken to not apply an input signal prior to the output port being disabled (tdis maximum). 8.2 Typical Application System Controller CPU B1 VCCA VCCB DIR A1 2.5 V 0.7 V 0.1 µF 0.1 µF SN74AXC2T45 GND GPIO1 CAT ERR B2 A2 GPIO2 PROC HOT Figure 8-1. Processor Error Application www.ti.com SN74AXC2T45-Q1 SCES928B – APRIL 2021 – REVISED JANUARY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: SN74AXC2T45-Q1 |
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