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поискавой системы для электроныых деталей |
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SLG47004 датащи(PDF) 13 Page - Renesas Technology Corp |
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SLG47004 датащи(HTML) 13 Page - Renesas Technology Corp |
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13 / 302 page  Datasheet 8-Sep-2022 CFR0011-120-00 Revision 3.0 13 of 301 © 2022 Renesas Electronics Corporation SLG47004 GreenPAK Programmable Mixed-Signal Matrix with In-System Programmability and Advanced Analog Features 2 Pinout 2.1 PIN CONFIGURATION - STQFN-24L Table 1: Functional Pin Description Pin No. Pin Name Signal Name Function Input Options Output Options STQFN 24L 1 VDDA VDDA Analog Power Supply -- -- 2 AGND AGND Analog Ground -- -- 3 OA0- OA0- Op Amp0 Inverting Input Analog -- 4 OA0+ OA0+ Op Amp0 Non-Inverting Input Analog -- 5 OA0_OUT OA0_OUT Op Amp0 Output -- Analog ACMP0L+ Analog Comparator 0 Positive In- put Analog -- 6 RH0_A RH0_A Digital Rheostat 0 Terminal A -- -- Pin # Signal Name Pin Functions 1 VDDA Analog Power Supply 2 AGND Analog Ground 3 OA0- Op Amp0 Inverting Input 4 OA0+ Op Amp0 Non-Inverting Input 5 OA0_OUT Op Amp0_OUT/ACMP0L+ / 6 RH0_A Digital Rheostat 0 Terminal A 7 RH0_B Digital Rheostat 0 Terminal B 8 RH1_A Digital Rheostat 1 Terminal A 9 RH1_B Digital Rheostat 1 Terminal B 10 SCL I2C_SCL 11 SDA I2C_SDA 12 IO0 GPIO, ACMP0L-, ACMP1L-, EXT_OSC0_IN, Vref0_Out or Temp_Sens_Out 13 VDD Digital Power Supply 14 GND Digital Ground 15 IO1 GPIO, Chop_ACMP+, Vref1_OUT or Temp_Sens_Out, EXT_OSC1_IN or SLA_0 16 IO2 GPIO, ACMP0L+, EXT_OSC2_IN, SLA_1 17 IO3 GPIO, AS_1_A, ACMP1L+ or SLA_2 18 IO4 GPIO, AS_1_B, Chop_ACMP-or SLA_3 19 IO5 GPIO, AS_0_B 20 IO6 GPIO, AS_0_A, HD_Buff_Out, In Amp_Vref 21 I0 GPI, In Amp_OUT 22 OA1_OUT Op Amp1_OUT, ACMP1L+ 23 OA1+ Op Amp1 Non-inverting Input 24 OA1- Op Amp1 Inverting Input Legend: IO2 IO3 IO4 OA0+ OA0- 2 3 4 16 17 18 AGND VDDA 1 RH0_A OA0_OUT 5 6 GND IO1 14 15 VDD 13 8 9 10 22 23 24 STQFN-24 21 7 (Top View) 11 12 20 19 ACMPx+: ACMPx Positive Input ACMPx-: ACMPx Negative Input SCL: I2 C Clock Input SDA: I2C Data Input/Output Vrefx: Voltage Reference Output SLA: Slave Address |
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