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ADC08D500 датащи(PDF) 7 Page - Texas Instruments

номер детали ADC08D500
подробное описание детали  High Performance Quad DVGA
PDF  33 Pages
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ADC08D500 датащи(HTML) 7 Page - Texas Instruments

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LMH6523
www.ti.com
SNOSC88 – DECEMBER 2012
Table 1. PIN FUNCTIONS (continued)
PIN NUMBER
SYMBOL
PIN CATEGORY
DESCRIPTION
32
ENBD
Digital Input
Channel D enable pin
Parallel Mode Digital Pins, MODE = Logic Low
49, 48, 47, 46,
A0, A1, A2, A3, A4
Digital Input
Channel A attenuator control
45
54, 53, 52, 51,
B0, B1, B2, B3, B4
Digital Input
Channel B attenuator control
50
19, 20, 21, 22,
C0, C1, C2, C3, C4
Digital Input
Channel C attenuator control
23
24, 25, 26, 27,
D0, D1, D2, D3, D4
Digital Input
Channel D attenuator control
28
Serial Mode Digital Pins, MODE = Logic High
SPI Compatible
45
SDO
Digital Output-
Serial Data Output (Requires external bias.)
Open Collector
46
SDI
Digital Input
Serial Data In
47
CSb
Digital Input
Chip Select
48
CLK
Digital Input
Clock
Table 2. PIN LIST
PIN
DESCRIPTION
PIN
DESCRIPTION
1
GND
28
D4
2
INA+
29
OUTD–
3
INA–
30
OUTD+
4
GND
31
+5VD
5
MODE
32
ENBD
6
GND
33
+5VC
7
INB+
34
OUTC–
8
INB–
35
OUTC+
9
GND
36
ENBC
10
GND
37
ENBB
11
INC+
38
OUTB–
12
INC–
39
OUTB+
13
GND
40
+5VB
14
GND
41
ENBA
15
GND
42
+5VA
16
IND+
43
OUTA–
17
IND–
44
OUTA+
18
GND
45
A4 / SDO
19
C0
46
A3 / SDI
20
C1
47
A2 / CSb
21
C2
48
A1 / CLK
22
C3
49
A0
23
C4
50
B4
24
D0
51
B3
25
D1
52
B2
26
D2
53
B1
27
D3
54
BO
Copyright © 2012, Texas Instruments Incorporated
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