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LM49120TLEVAL датащи(PDF) 22 Page - Texas Instruments

номер детали LM49120TLEVAL
подробное описание детали  LM49120 Audio Sub-System with Mono Class AB Loudspeaker Amplifier and Stereo OCL/SE Headphone Amplifier
PDF  29 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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LM49120TLEVAL датащи(HTML) 22 Page - Texas Instruments

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LM49120, LM49120TLEVAL
SNAS431C – JUNE 2008 – REVISED MAY 2013
www.ti.com
POWER DISSIPATION
Power dissipation is a major concern when designing a successful single-ended or bridged amplifier.
A direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power
dissipation. The LM49120 has a pair of bridged-tied amplifiers driving a handsfree speaker, MONO. The
maximum internal power dissipation operating in the bridge mode is twice that of a single-ended amplifier. From
Equation 2, assuming a 5V power supply and an 8
Ω load, the maximum MONO power dissipation is 633mW.
PDMAX-SPKROUT = 4(VDD)
2/ (2π2 R
L): Bridge Mode
(3)
The LM49120 also has a pair of single-ended amplifiers driving stereo headphones, ROUT and LOUT. The
maximum internal power dissipation for ROUT and LOUT is given by Equation 3 and Equation 4. From Equation 3
and Equation 4, assuming a 5V power supply and a 32
Ω load, the maximum power dissipation for LOUT and ROUT
is 40mW, or 80mW total.
PDMAX-LOUT = (VDD)
2 / (2π2 R
L): Single-ended Mode
(4)
PDMAX-ROUT = (VDD)
2 / (2π2 R
L): Single-ended Mode
(5)
The maximum internal power dissipation of the LM49120 occurs when all three amplifiers pairs are
simultaneously on; and is given by Equation 5.
PDMAX-TOTAL = PDMAX-SPKROUT + PDMAX-LOUT + PDMAX-ROUT
(6)
The maximum power dissipation point given by Equation 5 must not exceed the power dissipation given by
Equation 6:
PDMAX = (TJMAX - TA) / θJA
(7)
The LM49120's TJMAX = 150°C. In the SQ package, the LM49120's θJA is 46°C/W. At any given ambient
temperature TA, use Equation 6 to find the maximum internal power dissipation supported by the IC packaging.
Rearranging Equation 6 and substituting PDMAX-TOTAL for PDMAX' results in Equation 7. This equation gives the
maximum ambient temperature that still allows maximum stereo power dissipation without violating the
LM49120's maximum junction temperature.
TA = TJMAX - PDMAX-TOTAL θJA
(8)
For a typical application with a 5V power supply and an 8
Ω load, the maximum ambient temperature that allows
maximum mono power dissipation without exceeding the maximum junction temperature is approximately 121°C
for the SQ package.
TJMAX = PDMAX-TOTAL θJA + TA
(9)
Equation 8 gives the maximum junction temperature TJMAX. If the result violates the LM49120's 150°C, reduce
the maximum junction temperature by reducing the power supply voltage or increasing the load resistance.
Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is a surface mount part operating around the maximum power
dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are
allowed as output power or duty cycle decreases. If the result of Equation 5 is greater than that of Equation 6,
then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these
measures are insufficient, a heat sink can be added to reduce
θJA. The heat sink can be created using additional
copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins.
External, solder attached SMT heatsinks such as the Thermalloy 7106D can also improve power dissipation.
When adding a heat sink, the
θJA is the sum of θJC, θCS, and θSA. (θJC is the junction-to-case thermal impedance,
θCS is the case-to-sink thermal impedance, and θSA is the sink-to-ambient thermal impedance). Refer to the
Typical Performance Characteristics curves for power dissipation information at lower output power levels.
PROPER SELECTION OF EXTERNAL COMPONENTS
Power Supply Bypassing/Filtering
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitors as close to the device as possible. Place a 1
μF ceramic capacitor from VDD to GND. Additional bulk
capacitance may be added as required.
22
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Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM49120 LM49120TLEVAL



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