D

C

B

A

1

2

3

4

VOC

VDD

ROUT

LOUT

MONO_IN+

MONO_IN-

BYPASS

LIN

RIN

I

2

CVDD

SCL

SDA

MONO-

MONO+

GND

VDD

LM49120, LM49120TLEVAL

www.ti.com

SNAS431C – JUNE 2008 – REVISED MAY 2013

Connection Diagram

Top View

Figure 3. 16 Bump DSBGA Package

(Bump-Side Down)

See Package Number YZR0016

PIN DESCRIPTIONS

Bump

Name

Description

A1

VOC

Headphone Center Amplifier Output

A2

VDD

Headphone Power Supply

A3

ROUT

Right Channel Headphone Output

A4

LOUT

Left Channel Headphone Output

B1

MONO_IN+

Mono Non-inverting Input

B2

BYPASS

Bias Bypass

B3

LIN

Left Channel Input

B4

RIN

Right Channel Input

C1

MONO_IN-

Mono Inverting Input

C2

I2CVDD

I2C Interface Power Supply

C3

SCL

I2C Clock Input

C4

SDA

I2C Data Input

D1

MONO-

Loudspeaker Inverting Output

D2

GND

Ground

D3

VDD

Power Supply

D4

MONO+

Loudspeaker Non-inverting Output

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Copyright © 2008–2013, Texas Instruments Incorporated

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