UVLO

LM5035B

VPWR

STANDBY

OFF

OFF

STANDBY

1.25V

0.4V

23 PA

R2

R1

1.25V x (R1 + RCOMBINED)

OVPoff

R3 =

RCOMBINED =

1.25V x R1

UVLOoff ± 1.25V

LM5035B

SNVS613C – JULY 2009 – REVISED APRIL 2013

www.ti.com

(12)

Then R3 is determined by selecting the OVP disabling threshold:

(13)

Finally, R3 is subtracted from RCOMBINED to give R2:

R2 = RCOMBINED - R3

(14)

Remote configuration of the controller’s operational modes can be accomplished with open drain device(s)

connected to the UVLO pin as shown in Figure 25.

Figure 25. Remote Standby and Disable Control

FAULT PROTECTION

The Over Voltage Protection (OVP) comparator of the LM5035B can be configured for line or load fault protection

or thermal protection using an external temperature sensor or thermistor. Figure 23 shows a line over voltage

shutdown application using a voltage divider between the input power supply, VPWR, and AGND to monitor the

line voltage.

Figure 26 demonstrates the use of the OVP pin for latched output over-voltage fault protection, using a zener

and opto-coupler. When VOUT exceeds the conduction threshold of the opto-coupler diode and zener, the opto-

coupler momentarily turns on Q1 and the LM5035B enters standby mode, disabling the drivers and enabling the

hysteresis current source on the OVP pin. Once the current source is enabled, the OVP voltage will remain at

2.3V (23 µA x 100 k

Ω) without additional drive from the external circuit. If the opto-coupler transistor emitter were

directly connected to the OVP pin, then leakage current in the zener diode amplified by the opto-coupler’s gain

could falsely trip the protection latch. R1 and Q1 are added reduce the sensitivity to low level currents in the

opto-coupler. Using the values of Figure 26, the opto-coupler collector current must equal VBE(Q1) / R1 = 350 µA

before OVP latches. Once the controller has switched to standby mode, the outputs no longer switch but the

VCC and REF regulators continue functioning and supply bias to the external circuitry. VCC must fall below 6.2V

or the UVLO pin must fall below 0.4V to clear the OVP latch.

24

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