CDx4HC(T)166 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

1 Features

• Buffered inputs

• Fanout (over temperature range)

– Standard outputs: 10 LSTTL Loads

– Bus driver outputs: 15 LSTTL Loads

• Wide operating temperature range: -55

℃ to 125℃

• Balanced propagation delay and transition time

• Significant power reduction compared to LSTTL

Logic ICs

• HC Types

– 2 V to 6 V operation

– High noise immunity: NIL = 30%, NIH = 30% of

VCC at VCC = 5 V

• HCT Types

– 4.5 V to 5.5 V Operation

– Direct LSTTL Input Logic Compatibility,

VIL = 0.8V (Max), VIH = 2 V (Min)

2 Description

The ’HC166 and ’HCT166 8-bit shift register is

fabricated with silicon gate CMOS technology. It

possesses the low power consumption of standard

CMOS integrated circuits, and can operate at speeds

comparable to the equivalent low power Schottky

device.

Device Information

PART NUMBER

PACKAGE

(1)

BODY SIZE (NOM)

CD54HC166F3A

CDIP (16)

24.38 mm × 6.92 mm

CD54HCT166F3A

CDIP (16)

24.38 mm × 6.92 mm

CD74HC166M

SOIC (16)

9.90 mm × 3.90 mm

CD74HCT166M

SOIC (16)

9.90 mm × 3.90 mm

CD74HC166E

PDIP (16)

19.31 mm × 6.35 mm

CD74HCT166E

PDIP (16)

19.31 mm × 6.35 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

SH/LD

SER

CLK INH

CLK

C1

1D

R

1

15

2

10

A

B

C

D

E

F

G

H

11

12

13

14

15

16

17

18

CLR

1

C1

1D

R

C1

1D

R

C1

1D

R

C1

1D

R

C1

1D

R

C1

1D

R

C1

1D

R

13

Q

H

Functional Diagram

CD54HC166, CD54HCT166, CD74HC166, CD74HCT166

SCHS157D – FEBRUARY 1998 – REVISED FEBRUARY 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.