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CC2550-RTY1 датащи(PDF) 53 Page - Texas Instruments |
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CC2550-RTY1 датащи(HTML) 53 Page - Texas Instruments |
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53 / 62 page ![]() CC2550 SWRS039B Page 53 of 58 29.1 Recommended PCB Layout for Package (QLP 16) Figure 24: Recommended PCB layout for QLP 16 package Note: The figure is an illustration only and not to scale. There are five 10 mil diameter via holes distributed symmetrically in the ground pad under the package. See also the CC2550EM reference design [3]. 29.2 Package Thermal Properties Thermal Resistance Air velocity [m/s] 0 Rth,j-a [K/W] 40.1 Table 28: Thermal Properties of QLP 16 Package 29.3 Soldering Information The recommendations for lead-free reflow in IPC/JEDEC J-STD-020D should be followed. |
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