TLK2501

1.5 TO 2.5 GBPS TRANSCEIVER

SLLS427D − AUGUST 2000 − REVISED JULY 2003

13

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

synchronization and initialization (continued)

ACQ

RX_DV

RXD(0−15)

SYNC

DINRXP,

D0−D15

DINRXN

D0−D15

Valid Data or

Error Prop

XXXXXXXXXXXXXXXXXXX

RESET

(Internal Signal)

IDLE

D0−D15

D0−D15

Valid Data or

Error Prop

RX_ER

Figure 9. Receive Side Timing Diagram (Valid Data or Error Propagation)

redundant port operation

The TLK2501 allows users to design a redundant port by connecting receive data bus terminals from two

TLK2501 devices together. Asserting the LCKREFN to a low state causes the receive data bus terminals, the

RXD[0:15], RX_CLK and RX_ER, and RX_DV/LOS to go to a high-impedance state.

PRBS verification

The TLK2501 also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can check

for errors and report the errors by forcing the RX_ER/PRBSPASS terminal low.

reference clock input

The reference clock (GTX_CLK) is an external input clock that synchronizes the transmitter interface. The

reference clock is then multiplied in frequency 10 times to produce the internal serialization bit clock. The internal

serialization bit clock is frequency-locked to the reference clock and used to clock out the serial transmit data

on both its rising and falling edges, providing a serial data rate that is 20 times the reference clock.

operating frequency range

The TLK2501 is optimized for operation at a serial data rate of 2.5 Gbps. The TLK2501 may operate at a serial

data rate between 1.5 Gbps to 2.5 Gbps. The GTX_CLK must be within

±100 PPM of the desired parallel data

rate clock.

testability

The TLK2501 has a comprehensive suite of built-in self-tests. The loopback function provides for at-speed

testing of the transmit/receive portions of the circuitry. The enable terminal allows for all circuitry to be disabled

so that a quiescent current test can be performed. The PRBS function allows for a BIST (built-in self-test).

loopback testing

The transceiver can provide a self-test function by enabling (LOOPEN) the internal loopback path. Enabling this

terminal causes serial-transmitted data to be routed internally to the receiver. The parallel data output can be

compared to the parallel input data for functional verification. (The external differential output is held in a

high-impedance state during the loopback testing.)