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ABSOLUTE MAXIMUM RATING

RECOMMENDED OPERATING CONDITIONS

PACKAGE DISSIPATION RATINGS

THS4302

SLOS403H – OCTOBER 2002 – REVISED AUGUST 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

over operating free-air temperature range unless otherwise noted

(1)

UNIT

Supply voltage, VS

6 V

Input voltage, VI

±VS

Output current, IO

200 mA

Continuous power dissipation

See Dissipation Rating Table

Maximum junction temperature, TJ

150

°C

Maximum junction temperature, continuous operation, long term reliability, TJ

(2)

125

°C

Storage temperature range, Tstg

-65

°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

300

°C

(1)

The absolute maximum temperature under any condition is limited by the constraints of the silicon process. Stresses above these

ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not

implied.

(2)

The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may

result in reduced reliability and/or lifetime of the device.

MIN

MAX

UNIT

Dual supply

±1.5

±2.5

Supply voltage, VCC (VS+ and VS-)

V

Single supply

3

5

Common-mode input voltage range

VS- +1

VS+ -1

V

POWER RATING(2)

PACKAGE

θJC(°C/W)

θJA(°C/W)

(1)

TA ≤ 25°C

TA = 25°C

RGT (16)(3)

2.4

39.5

3.16

1.65 W

(1)

This data was taken using the JEDEC standard High-K test PCB.

(2)

Power rating is determined with a junction temperature of 125

°C. This is the point where distortion starts to substantially increase.

Thermal management of the final PCB should strive to keep the junction temperature at or below 125

°C for best performance and long

term reliability.

(3)

The THS4302 device may incorporate a PowerPAD™ on the underside of the chip. This acts as a heatsink and must be connected to a

thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature

which can permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the

PowerPAD thermally enhanced package.

AVAILABLE OPTIONS

INTERNAL FIXED GAIN

TRANSPORTATION MEDIA,

PACKAGED DEVICES

PACKAGE TYPE(1)

RESISTOR VALUES (+5)

QUANTITY

RG

RF

THS4302RGTT

Tape and Reel, 250

Leadless (RGT-16)

50

Ω

200

Ω

THS4302RGTR

Tape and Reel, 3000

(1)

The PowerPAD is electrically isolated from all other pins.

2

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