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SN260 датащи(PDF) 7 Page - STMicroelectronics |
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SN260 датащи(HTML) 7 Page - STMicroelectronics |
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7 / 88 page ![]() SN260 Pin assignment 7/88 11 nRESET I Active low chip reset (internal pull-up) 12 VREG_OUT Power Regulator output (1.8V) 13 VDD_PADS Power Pads supply (2.1 – 3.6V) 14 VDD_CORE Power 1.8V digital core supply 15 nSSEL_INT I SPI Slave Select Interrupt (from Host to SN260) This signal must be connected to nSSEL (Pin 21) 16 RES Reserved for future use, do not connect to any signal. 17 MOSI I SPI Data, Master Out / Slave In (from Host to SN260) 18 MISO O SPI Data, Master In / Slave Out (from SN260 to Host) 19 VDD_PADS Power Pads supply (2.1 – 3.6V) 20 SCLK I SPI Clock (from Host to SN260) 21 nSSEL I SPI Slave Select (from Host to SN260) 22 PTI_EN O Frame signal of Packet Trace Interface (PTI) 23 PTI_DATA O Data signal of Packet Trace Interface (PTI) 24 VDD_PADS Power Pads supply (2.1 – 3.6V) 25 RES Reserved for future use, do not connect to any signal. 26 nHOST_INT O Host Interrupt signal (from SN260 to Host) 27 SIF_CLK I Serial Interface, Clock (internal pull down) 28 SIF_MISO O Serial Interface, Master In / Slave Out 29 SIF_MOSI I Serial Interface, Master Out / Slave In 30 nSIF_LOAD I/O Serial Interface, load strobe (open collector with internal pull up) 31 GND Power Ground Supply 32 VDD_FLASH Power 1.8V Flash memory supply 33 SDBG O Spare Debug signal 34 LINK_ACTIVITY O Link and Activity signal 35 nWAKE I Wake Interrupt signal (from Host to SN260) 36 VDD_CORE Power 1.8V digital core supply 37 VDD_SYNTH_PRE Power 1.8V synthesizer and pre-scalar supply 38 OSCB I/O 24MHz crystal oscillator or left open for when using an external clock input on OSCA 39 OSCA I/O 24MHz crystal oscillator or external clock input 40 VDD_24MHZ Power 1.8V high-frequency oscillator supply 41 GND Ground Ground supply pad in the bottom center of the package forms Pin 41 (see the EM260 Reference Design for PCB considerations) Table 1. Pin descriptions (continued) Pin # Signal Direction Description |
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