1A

1B

1Y

1

2

7

2A

2B

2Y

5

6

3

9

SN74LVC2G02

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SCES194N – APRIL 1999 – REVISED MAY 2019

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Copyright © 1999–2019, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The SN74LVC2G02 device contains two 2-input positive-NOR gates and each gate performs the Boolean

function Y = A + B or Y = A • B. This device is fully specified for partial-power-down applications using Ioff. The Ioff

circuitry disables the outputs, preventing damaging current backflow through the device when it is powered

down.

8.2 Functional Block Diagram

8.3 Feature Description

•

Wide operating voltage range.

–

Operates from 1.65 V to 5.5 V.

•

Allows down voltage translation.

•

Inputs accept voltages to 5.5 V.

•

Ioff feature allows voltages on the inputs and outputs, when VCC is 0 V.

8.4 Device Functional Modes

Table 1. Function Table

(Each Gate)

INPUTS

OUTPUT

Y

A

B

H

X

L

X

H

L

L

L

H