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LAN9252V/ML датащи(PDF) 207 Page - Microchip Technology

номер детали LAN9252V/ML
подробное описание детали  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9252V/ML датащи(HTML) 207 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001909A-page 207
LAN9252
Note 3:
Timing is designed for a system load between 10 pF and 25 pF.
12.9.7.2
Back-to-Back MII Connection Timing
With the previously listed MII TX and RX timings, back-to-back connections should use a TX shift value of 3 or 0.
FIGURE 12-8:
MII RX TIMING
TABLE 12-5:
MII RX TIMING VALUES
Symbol
Description
Min
Max
Units
Notes
tclkp
MII_RXCLK period
40
-
ns
tclkh
MII_RXCLK high time
tclkp * 0.4
tclkp * 0.6
ns
tclkl
MII_RXCLK low time
tclkp * 0.4
tclkp * 0.6
ns
tsu
MII_RXD[3:0], MII_RXER, MII_RXDV setup time to
rising edge of MII_RXCLK
5.0
-
ns
Note 3
thold
MII_RXD[3:0], MII_RXER, MII_RXDV hold time after
rising edge of MII_RXCLK
6.0
-
ns
Note 3
MII_RXCLK
tsu
MII_RXD[3:0],
MII_RXER
MII_RXDV
tclkh
tclkl
tclkp
thold
tsu thold
thold
tsu
(input)
thold



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