LAN9252VSLASHML datasheet(176/329 Pages) MICROCHIP

176 / 329 page

LAN9252

DS00001909A-page 176

 2015 Microchip Technology Inc.

To read or write an MMD register, the following procedure must be observed:

Write the PHY x MMD Access Control Register (PHY_MMD_ACCESS) with 00b (address) for the MMD Function

field and the desired MMD device (3 for PCS, 7 for Auto-Negotiation) for the MMD Device Address (DEVAD) field.

Write the PHY x MMD Access Address/Data Register (PHY_MMD_ADDR_DATA) with the 16-bit address of the

desired MMD register to read/write within the previously selected MMD device (PCS or Auto-Negotiation).

Write the PHY x MMD Access Control Register (PHY_MMD_ACCESS) with 01b (data) for the MMD Function

field and choose the previously selected MMD device (3 for PCS, 7 for Auto-Negotiation) for the MMD Device

Address (DEVAD) field.

If reading, read the PHY x MMD Access Address/Data Register (PHY_MMD_ADDR_DATA), which contains the

selected MMD register contents. If writing, write the PHY x MMD Access Address/Data Register (PHY_M-

MD_ADDR_DATA) with the register contents intended for the previously selected MMD register.

Unless otherwise specified, reserved fields must be written with zeros if the register is written.

(Vendor Specific)

PHY x Vendor Specific MMD 1 Device ID 1 Register

(PHY_VEND_SPEC_MMD1_DEVID1_x)

PHY x Vendor Specific MMD 1 Device ID 2 Register

(PHY_VEND_SPEC_MMD1_DEVID2_x)

PHY x Vendor Specific MMD 1 Devices Present 1 Register

(PHY_VEND_SPEC_MMD1_PRESENT1_x)

PHY x Vendor Specific MMD 1 Devices Present 2 Register

(PHY_VEND_SPEC_MMD1_PRESENT2_x)

PHY x Vendor Specific MMD 1 Status Register

(PHY_VEND_SPEC_MMD1_STAT_x)

PHY x Vendor Specific MMD 1 Package ID 1 Register

(PHY_VEND_SPEC_MMD1_PKG_ID1_x)

PHY x Vendor Specific MMD 1 package ID 2 Register

(PHY_VEND_SPEC_MMD1_PKG_ID2_x)

TABLE 11-14: MMD REGISTERS (CONTINUED)

MMD DEVICE

ADDRESS

(IN DECIMAL)

INDEX

(IN DECIMAL)

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