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PCM1609APT.B датащи(PDF) 30 Page - Texas Instruments |
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PCM1609APT.B датащи(HTML) 30 Page - Texas Instruments |
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30 / 47 page ![]() www.ti.com ZERO FLAG ZERO-DETECT CONDITION ZERO OUTPUT FLAGS PCM1609A SLES145B – AUGUST 2005 – REVISED MARCH 2008 Zero detection for each output channel is independent from the others. If the data for a given channel remains at a 0 level for 1024 sample periods (or LRCK clock periods), a zero-detect condition exists for that channel. Given that a zero-detect condition exists for one or more channels, the zero-flag pins for those channels are set to a logic-1 state. Each channel, ZERO1 through ZERO6 (pins 1 through 6), ZERO7 (pin 30), and ZERO8 (pin 32), has zero-flag pins. In addition, all eight zero flags are logically ANDed together, and the result is provided at the ZEROA pin (pin 48), which is set to a logic-1 state when all channels indicate a zero-detect condition. The zero-flag pins can be used to operate external mute circuits. ZERO1 through ZERO6 can be used as status indicators for a microcontroller, audio signal processor, or other digitally controlled function. The active polarity of the zero-flag output can be inverted by setting to 1 the ZREV bit of control register 10. The reset default is active-high output, or ZREV = 0. 30 Submit Documentation Feedback Copyright © 2005–2008, Texas Instruments Incorporated Product Folder Link(s): PCM1609A |
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