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PCM1609A

SLES145B – AUGUST 2005 – REVISED MARCH 2008

B15

B14

B13

B12

B11

B10

B9

B8

B7

B6

B5

B4

B3

B2

B1

B0

REGISTER 9

R/W

IDX6

IDX5

IDX4

IDX3

IDX2

IDX1

IDX0

RSV

RSV

FLT

CLKD

CLKE

FMT2

FMT1

FMT0

R/W – Read/Write Mode Select

When R/W = 0, a write operation is performed.

When R/W = 1, a read operation is performed.

Default value: 0

FLT – Digital Filter Rolloff Control

This bit is read/write.

Default value: 0

FLT = 0

Sharp rolloff (default)

FLT = 1

Slow rolloff

The FLT bit allows users to select the digital filter rolloff that is best suited to their application. Two filter rolloff

selections are available: sharp or slow. The filter responses for these selections are shown in the Typical

Performance Curves section of this data sheet.

CLKD – SCKO Frequency Selection

This bit is read/write.

Default value: 0

CLKD = 0

Full-rate, fSCKO = fSCKI (default)

CLKD = 1

Half-rate, fSCKO = fSCKI/2

The CLKD bit is used to determine the clock frequency at the system clock output pin, SCKO.

CLKE – SCKO Output Enable

This bit is read/write.

Default value: 0

CLKE = 0

SCKO enabled (default)

CLKE = 1

SCKO disabled

The CLKE bit is used to enable or disable the system clock output pin, SCKO. When SCKO is enabled, it outputs

either a full- or half-rate clock, based on the setting of the CLKD bit. When SCKO is disabled, it is set to a LOW

level.

24

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