LP3990-Q1

SNVSA66A – OCTOBER 2014 – REVISED DECEMBER 2015

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8.2.2.1 Power Dissipation and Device Operation

The permissible power dissipation for any package is a measure of the capability of the device to pass heat from

the power source, the junctions of the device, to the ultimate heat sink, the ambient environment. Thus, the

power dissipation is dependent on the ambient temperature and the thermal resistance across the various

interfaces between the die junction and ambient air.

The maximum allowable power dissipation for the device in a given package can be calculated using Equation 1:

PD-MAX = ((TJ-MAX – TA) / RθJA)

(1)

The actual power being dissipated in the device can be represented by Equation 2:

PD = (VIN – VOUT) × IOUT

(2)

Equation 1 and Equation 2 establish the relationship between the maximum power dissipation allowed due to

thermal consideration, the voltage drop across the device, and the continuous current capability of the device.

Equation 1 and Equation 2 should be used to determine the optimum operating conditions for the device in the

application.

In applications where lower power dissipation (PD) and/or excellent package thermal resistance (RθJA) is present,

the maximum ambient temperature (TA-MAX) may be increased.

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum

ambient temperature (TA-MAX) may have to be derated. TA-MAX is dependent on the maximum operating junction

temperature (TJ-MAX-OP = 125°C), the maximum allowable power dissipation in the device package in the

application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (RθJA),

as given by Equation 3:

TA-MAX = (TJ-MAX-OP – (RθJA × PD-MAX))

(3)

Alternately, if TA-MAX can not be derated, the PD value must be reduced. This can be accomplished by reducing

VIN in the VIN – VOUT term as long as the minimum VIN is met, or by reducing the IOUT term, or by some

combination of the two.

8.2.2.2 External Capacitors

In common with most regulators, the LP3990-Q1 requires external capacitors for regulator stability. The LP3990-

Q1 is specifically designed for portable applications requiring minimum board space and smallest components.

These capacitors must be correctly selected for good performance.

8.2.2.3 Input Capacitor

An input capacitor is required for stability. It is recommended that a 1-µF capacitor be connected between the

LP3990-Q1 IN pin and GND pin (this capacitance value may be increased without limit).

This capacitor must be located a distance of not more than 1 cm from the IN pin and returned to a clean

analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.

Important: To ensure stable operation it is essential that good PCB design practices are employed to minimize

ground impedance and keep input inductance low. If these conditions cannot be met, or if long leads are used to

connect the battery or other power source to the LP3990-Q1, then it is recommended that the input capacitor is

increased. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connected to a

low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the

input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application.

There are no requirements for the equivalent series resistance (ESR) on the input capacitor, but tolerance and

temperature coefficient must be considered when selecting the capacitor to ensure the capacitance remains

approximately 1 µF over the entire operating temperature range.

8.2.2.4 Output Capacitor

The LP3990-Q1 is designed specifically to work with very small ceramic output capacitors. A 1-µF ceramic

capacitor (temperature types Z5U, Y5V or X7R/X5R) with ESR between 5 m

Ω to 500 mΩ, is suitable in the

LP3990-Q1 application circuit.

For this device the output capacitor must be connected from the OUT pin to the GND pin.

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