0

0.2

0.4

0.6

0.8

LOAD CURRENT (A)

COUT > 4.7 PF

STABLE REGION

.001

.01

0.1

1.0

10

LP3881

SNVS224F – MARCH 2003 – REVISED APRIL 2013

www.ti.com

APPLICATION INFORMATION

Application Hints

EXTERNAL CAPACITORS

To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit.

OUTPUT CAPACITOR

At least 4.7µF of output capacitance is required for stability (the amount of capacitance can be increased without

limit). The output capacitor must be located less than 1 cm from the output pin of the IC and returned to a clean

analog ground. The ESR (equivalent series resistance) of the output capacitor must be within the "stable" range

as shown in the graph below over the full operating temperature range for stable operation.

Figure 19. Minimum ESR vs Output Load Current

Tantalum capacitors are recommended for the output as their ESR is ideally suited to the part's requirements

and the ESR is very stable over temperature. Aluminum electrolytics are not recommended because their ESR

increases very rapidly at temperatures below 10C. Aluminum caps can only be used in applications where lower

temperature operation is not required.

A second problem with Al caps is that many have ESR's which are only specified at low frequencies. The typical

loop bandwidth of a linear regulator is a few hundred kHz to several MHz. If an Al cap is used for the output cap,

it must be one whose ESR is specified at a frequency of 100 kHz or more.

Because the ESR of ceramic capacitors is only a few milli Ohms, they are not suitable for use as output

capacitors on LP388X devices. The regulator output can tolerate ceramic capacitance totaling up to 15% of the

amount of Tantalum capacitance connected from the output to ground.

OUTPUT "BYPASS" CAPACITORS

Many designers place small value "bypass" capacitors at various circuit points to reduce noise. Ceramic

capacitors in the value range of about 1000pF to 0.1µF placed directly on the output of a PNP or P-FET LDO

regulator can cause a loss of phase margin which can result in oscillations, even when a Tantalum output

capacitor is in parallel with it. This is not unique to Texas Instruments LDO regulators, it is true of any P-type

LDO regulator.

The reason for this is that PNP or P-FET regulators have a higher output impedance (compared to an NPN

regulator), which results in a pole-zero pair being formed by every different capacitor connected to the output.

The zero frequency is approximately:

Fz = 1 / (2 X π X ESR X C)

where

•

ESR is the equivalent series resistance of the capacitor

8

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