TAB

IS

GND

OUT

GND

EN 1

2

3

4

5

IN

ERROR

Exposed

DAP

OUT

GND

EN 1

2

3

4

5

IN

ERROR

LP38512

SNOSAU7F – NOVEMBER 2007 – REVISED APRIL 2013

www.ti.com

Connection Diagram

Figure 1. Top View

Figure 2. Top View

DDPAK/TO-263 5 Pin Package

PFM 5 Pin Package

Table 1. Pin Descriptions for DDPAK/TO-263 and PFM Packages

Pin #

Pin Name

Function

Enable. Pull high to enable the output, low to disable the output. This pin has no internal bias

1

EN

and must be tied to the input voltage, or actively driven.

2

IN

Input Supply Pin

3

GND

Ground

4

OUT

Regulated Output Voltage Pin

ERROR Flag. A high level indicates that VOUT is within typically 15% (VOUT falling) of the

5

ERROR

nominal regulated voltage.

The DDPAK/TO-263 TAB, and the PFM DAP, is used as a thermal connection to remove heat

TAB/DAP

TAB/DAP

from the device to an external heatsink. The TAB/DAP is internally connected to device pin 3,

and is electrical ground connection.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Storage Temperature Range

−65°C to +150°C

Soldering Temperature (3)

DDPAK/TO-263

235°C, 30s

ESD Rating (4)

±2 kV

Power Dissipation(5)

Internally Limited

Input Pin Voltage (Survival)

−0.3V to +6.0V

Enable Pin Voltage (Survival)

−0.3V to +6.0V

Output Pin Voltage (Survival)

−0.3V to +6.0V

ERROR Pin Voltage (Survival)

0.3V to +6.0V

IOUT(Survival)

Internally Limited

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions,

see the Electrical Characteristics.

(2)

If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3)

Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the

temperatures and times are for Sn-Pb (STD) only.

(4)

The human body model is a 100pF capacitor discharged through a 1.5k

Ω resistor into each pin. Test method is per JESD22-A114.

(5)

Device operation must be evaluated, and derated as needed, based on ambient temperature (TA), power dissipation (PD), maximum

allowable operating junction temperature (TJ(MAX)), and package thermal resistance (θJA).

2

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