LP38511

SNOSAU6E – NOVEMBER 2007 – REVISED APRIL 2013

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While VIN is high enough to keep the control circuity alive, and the Enable pin is above the VEN(ON) threshold, the

control circuitry will attempt to regulate the output voltage. Since the input voltage is less than the output voltage

the control circuit will drive the gate of the pass element to the full on condition when the output voltage begins to

fall. In this condition, reverse current will flow from the output pin to the input pin, limited only by the RDS(ON) of

the pass element and the output to input voltage differential. Discharging an output capacitor up to 1000 µF in

this manner will not damage the device as the current will rapidly decay. However, continuous reverse current

should be avoided.

The internal PFET pass element in the LP38511 has an inherent parasitic diode. During normal operation, the

input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output

voltage to input voltage differential is more than 500 mV (typical) the parasitic diode becomes forward biased and

current flows from the output pin to the input through the diode. The current in the parasitic diode should limited

to less than 1A continuous and 5A peak.

If used in a dual-supply system where the regulator output load is returned to a negative supply, the output pin

must be diode clamped to ground. A Schottky diode is recommended for this protective clamp.

SHORT-CIRCUIT PROTECTION

The LP38511 is short circuit protected, and in the event of a peak over-current condition the short-circuit control

loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control

loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown

circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the POWER

DISSIPATION/HEATSINKING section for power dissipation calculations.

ENABLE OPERATION

The Enable ON threshold is typically 1.2V, and the OFF threshold is typically 1.0V. To ensure reliable operation

the Enable pin voltage must rise above the maximum VEN(ON) threshold and must fall below the minimum VEN(OFF)

threshold. The Enable threshold has typically 200mV of hysteresis to improve noise immunity.

The Enable pin (EN) has no internal pull-up or pull-down to establish a default condition and, as a result, this pin

must be terminated either actively or passively.

If the Enable pin is driven from a single ended device (such as discrete transistor) a pull-up resistor to VIN, or a

pull-down resistor to ground, will be required for proper operation. A 1 k

Ω to 100 kΩ resistor can be used as the

pull-up or pull-down resistor to establish default condition for the EN pin. The resistor value selected should be

appropriate to swamp out any leakage in the external single ended device, as well as any stray capacitance.

If the Enable pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator

output), the pull-up, or pull-down, resistor is not required.

If the application does not require the Enable function, the pin should be connected to directly to the adjacent VIN

pin.

The status of the Enable pin also affects the behavior of the ERROR Flag. While the Enable pin is high the

regulator control loop will be active and the ERROR Flag will report the status of the output voltage. When the

Enable pin is taken low the regulator control loop is shutdown, the output is turned off, and the ERROR Flag pin

is immediately forced low.

ERROR FLAG OPERATION

When the LP38511 Enable pin is high, the ERROR Flag pin will produce a logic low signal when the output

drops by more than 15% from the nominal output voltage. The drop in output voltage may be due to low input

voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The output voltage will typically

need to rise to within 10% (typical) of the nominal output voltage for the ERROR Flag to return to a logic high

state. It should also be noted that when the Enable pin is pulled low, the ERROR Flag pin is forced to be low as

well.

The internal ERROR flag comparator has an open drain output stage. Hence, the ERROR pin requires an

external pull-up resistor. The value of the pull-up resistor should be in the range of 10 k

Ω to 1 MΩ. The ERROR

Flag pin should not be pulled-up to any voltage source higher than VIN as current flow through an internal

parasitic diode may cause unexpected behavior. The ERROR Flag must be connected to ground if this function

is not used.

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