LM49150, LM49150TLEVAL

SNAS439C – AUGUST 2008 – REVISED MAY 2013

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CHARGE PUMP FLYING CAPACITOR (C1)

The flying capacitor (C1), see Figure 1, affects the load regulation and output impedance of the charge pump. A

C1 value that is too low results in a loss of current drive, leading to a loss of amplifier headroom. A higher valued

C1 improves load regulation and lowers charge pump output impedance to an extent. Above 2.2

μF, the RDS(ON)

of the charge pump switches and the ESR of C1 and Cs5 dominate the output impedance. A lower value

capacitor can be used in systems with low maximum output power requirements.

CHARGE PUMP HOLD CAPACITOR (Cs5)

The value and ESR of the hold capacitor (Cs5) directly affects the ripple on CPVSS. Increasing the value of Cs5

reduces output ripple. Decreasing the ESR of Cs5 reduces both output ripple and charge pump output

impedance. A lower value capacitor can be used in systems with low maximum output power requirements.

LM49150 Demoboard Bill Of Materials

Table 9. Bill Of Materials

Location

Qty

Description

Part Number

Manufacturer

CIN2, CIN1

2

0.22uF, 1206, 10V, X7R Ceramic Capacitor

GRM319R71C224KA01D

Murata

CS4, CS2

2

0.1uF, 0805, 10V, X7R Ceramic Capacitor

GRM219R71C104KA01D

Murata

CS7

1

1.0uF, 0805, 10V, X7R Ceramic Capacitor

GRM21BR71A105KA01L

Murata

CIN3, CIN4

2

1.0uF 1206, 10V, X7R Ceramic Capacitor

GRM319R71C105KAA3D

Murata

CS5, C1

2

2.2uF, 0603, 10V, X7R, Ceramic Capacitor

GRM188R71A225KE15D

Murata

CS1, CS3, CS6

3

2.2uF, Size A, Tantalum Capactior

293D225X9010A2TE3

Vishay

U2

1

LM49150, 16 bump DSBGA

LM49510

TI

R1, R2

2

5K ohm 1/10W 0.05% 0603 SMD

CRCW06035R1KJNEA

Vishay

J11, J12, J13, J14

4

3–Header

J1, J2, J3, J7, J8,

7

2–Header

J9, J10

J6

1

Header_3M 8516–4500PL

U1

1

Headphone Jack

Layout Guidelines

Minimize trace impedance of the power, ground and all output traces for optimum performance. Voltage loss due

to trace resistance between the LM49150 and the load results in decreased output power and efficiency. Trace

resistance between the power supply and the GND of the LM49150 has the same effect as a poorly regulated

supply, increased ripple and reduced peak output power. Use wide traces, for power-supply inputs and amplifier

outputs to minimize losses due to trace resistance, as well as providing heat dissipation from the device. Proper

grounding improves audio performance, minimizes crosstalk between channels and prevents switching noise

from interfering with audio signal. Use of power and ground planes is recommended.

The following recommendations should be considered when laying out the different grounds of the LM49150.

Refer to the Demo Board Schematic for the corresponding component designators. Bypass capacitors for AVDD

(CS7), LSVDD (CS1, CS2), VO(LDO) (CS3, CS4) should be grounded to the GND pin via a ground plane. Bypass

capacitor for CPVSS(CS5) should be grounded via a wide trace or a ground plane to the CPGND pin. The

headphone grounds should be connected to the GND via a separate trace also. This will help prevent noise from

the charge pump from feeding into the power supplies and the output.

Place all digital components and digital signal traces as far as possible from analog components and traces. Do

not run digital and analog traces in parallel on the same PCB layer.

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