DISP

DIST

K

K

PF

x

=

PF =

AVG

P

RMS

RMS

I

V

x

VREF

+

-

Switching Regulator

+

EMI

Bridge Rectifier

Energy

Storage

LM3450

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SNVS681D – NOVEMBER 2010 – REVISED MAY 2013

For higher power applications, where the dynamic hold provides much less current on average, the LM3450A

can be used. The LM3450A has continuous dynamic hold which prevents the dimmer from ever misfiring. This is

extremely helpful when designing for single stage solutions, where there is no second stage to provide good line

rejection. The continuous dynamic hold is also helpful for the higher power two stage applications where the

input capacitance is larger.

One last feature of the phase decoder is a dynamic filter that, combined with the variable sampling rate, provides

fast, smooth dimming transitions.

Figure 18. PFC System Architecture

PFC BACKGROUND

Power factor (PF) is a number between 0 and 1 that indicates how well energy is transmitted from input to output

of a system. It can be described by average power (PAVG), RMS voltage (VRMS), and RMS current (IRMS):

(1)

Or by distortion factor (KDIST) and displacement factor (KDISP):

(2)

With a purely resistive system, PF = 1. The addition of reactive elements necessary in any converter, such as

EMI filters and energy storage, will induce some amount of displacement (phase shift between the input voltage

and input current). The addition of switching devices will also create distortion (energy present in the harmonics

relative to the switching frequencies). These non-idealities decrease the PF towards zero.

Active power factor correction attempts to make the input impedance look as resistive as possible to the power

source. Since the output of the converter is usually a regulated voltage or current, there is a need for large

energy storage elements to remove the twice line frequency (100Hz or 120Hz) ripple. A power factor control

architecture, as shown in Figure 18, has very little capacitance at the input. Instead, the twice line frequency

content is removed with large energy storage capacitance at the output.

Using this control architecture, the converter is able to provide two important functions at the same time:

•

Shape the input current

•

Regulate the output voltage

The PFC control approach requires two separate control loops to achieve both functions: a fast loop which

shapes the input current, and a slow loop that regulates the output voltage.

The fast control loop shapes the input current to have the same sinusoidal shape as the AC input voltage.

Assuming both are perfect sinusoids with zero distortion or phase shift, the power factor will be perfect (unity).

Unfortunately, distortion is always present in switching converters. An input filter, which is required to comply with

EMI standards, helps to attenuate the switching content, thereby reducing distortion. However, the added filter

capacitance will increase the phase shift at the same time. Though perfect PF is not achievable within real

applications, extremely high PF (>.99) is possible using most active PFCs.

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