DS26C32AMQML

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SNOSAS3A – OCTOBER 2010 – REVISED APRIL 2013

DS26C32AMQML Quad Differential Line Receiver

Check for Samples: DS26C32AMQML

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FEATURES

DESCRIPTION

The DS26C32A is a quad differential line receiver

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•

CMOS Design for Low Power

designed to meet the RS-422, RS-423, and Federal

•

±0.2V Sensitivity Over Input Common Mode

Standards

1020

and

1030

for

balanced

and

Voltage Range

unbalanced digital data transmission, while retaining

•

Input Fail-Safe Circuitry

the low power characteristics of CMOS.

•

Inputs Won't Load Line When VCC = 0V

The DS26C32A has an input sensitivity of 200 mV

over the common mode input voltage range of ±7V.

•

Meets the Requirements of EIA Standard RS-

The DS26C32A features internal pull-up and pull-

422

down resistors which prevent output oscillation on

•

TRI-STATE Outputs for Connection to System

unused channels.

Buses

The DS26C32A provides an enable and disable

function common to all four receivers, and features

TRI-STATE outputs with 6 mA source and sink

capability. This product is pin compatible with the

DS26LS32A and the AM26LS32.

CONNECTION DIAGRAMS

Figure 1. CDIP and CLGA Packages-Top View

See Package Numbers NFE0016A, NAC0016A, or NAD0016A

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PRODUCTION DATA information is current as of publication date.

Copyright © 2010–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.