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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F071C8U6TR датащи(PDF) 77 Page - STMicroelectronics |
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STM32F071C8U6TR датащи(HTML) 77 Page - STMicroelectronics |
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77 / 121 page  DocID025451 Rev 3 77/121 STM32F071CB STM32F071RB STM32F071VB STM32F071V8 Electrical characteristics 96 All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 21 for standard I/Os, and in Figure 22 for 5 V tolerant I/Os. The following curves are design simulation results, not tested in production. Ilkg Input leakage current(2) TC, FT and FTf I/O TTa in digital mode VSS ≤ VIN ≤ VDDIOx -- ± 0.1 µA TTa in digital mode VDDIOx ≤ VIN ≤ VDDA -- 1 TTa in analog mode VSS ≤ VIN ≤ VDDA -- ± 0.2 FT and FTf I/O VDDIOx ≤ VIN ≤ 5 V -- 10 RPU Weak pull-up equivalent resistor (3) VIN = VSS 25 40 55 k Ω RPD Weak pull-down equivalent resistor(3) VIN = VDDIOx 25 40 55 k Ω CIO I/O pin capacitance - - 5 - pF 1. Data based on design simulation only. Not tested in production. 2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to Table 51: I/O current injection susceptibility. 3. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). Table 52. I/O static characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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