DS560DF810 56 Gbps Multi-Rate 8-Channel Retimer with Crosspoint

1 Features

• -channel multi-protocol retimer with integrated

signal conditioning

• All channels lock independently to both PAM4 and

NRZ data rates from 19.6 to 28.9 GBd (including

div-by-2 and div-by-4 sub-rates)

• Suitable for up to CEI-56G, Ethernet™ (400 GbE),

fibre channel (64GFC), InfiniBand™ (HDR), and

CPRI/eCPRI PCB, copper cable, and optical

applications

• Automatic lane rate switching for CDR lock up

to five different combinations of baud rates and

modulation types

• Low latency: <2000 ps (typical) at 26.5625 GBd

• Continuously adaptive time linear equalizer

(CTLE), RX feed-forward equalizer (FFE), and

decision feedback equalizer (DFE) to support 30+

dB channel loss at 13.28 GHz

• Integrated 2×2 crosspoint

• Adjustable 4-tap TX FFE filter

• Gearbox mode support (NRZ/PAM4 bit mux/de-

mux, NRZ/PAM4 serializer/deserializer)

• On-chip eye opening monitor (EOM), PRBS

generator, and PRBS checker for debug

• Dual 1.8-V and 1.2-V supplies

• –40°C to +85°C operating temperature range

• 8.00 mm × 13.00 mm BGA package with

integrated AC coupling capacitors

2 Applications

• Active electrical cables (AEC) (QSFP-DD, OSFP)

• Front-port C2M attachment unit interface (AUI)

jitter cleaning

• Backplane (KR) and midplane C2C attachment

unit interface (AUI) reach extension

• Speed doubling (gearbox) with NRZ-to-PAM4

aggregation and de-aggregation

3 Description

The DS560DF810 is an eight-channel multi-rate

retimer with integrated signal conditioning. It extends

the reach and robustness of long, lossy, crosstalk-

impaired high-speed serial links.

Each channel in the DS560DF810 independently

locks to symbol rates (PAM4 and NRZ) in a

continuous range from 19.6 to 28.9 GBd or to any

supported sub-rate. The integrated CDR function

is an excellent choice for front-port optical module

applications to reset the jitter budget and retime

the high-speed serial data. These features allow

for individual lane forward error correction (FEC)

pass-through. In addition, the DS560DF810 supports

automatic lane rate switching for CDR lock up to five

different combinations of baud rates and modulation

types without host intervention.

The

advanced

equalization

features

of

the

DS560DF810

include

a

continuously

adaptive

continuous-time linear equalizer (CTLE), RX feed-

forward equalizer (FFE), decision feedback equalizer

(DFE), and a programmable, low-jitter 4-tap TX feed-

forward equalizer (FFE) filter. These features enable

reach extension for lossy interconnects such as

direct-attach copper (DAC) cables and backplanes

with multiple connectors and crosstalk.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

DS560DF810

ALU (fcBGA, 135)

13 mm × 8 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

VDD1P2

ADDR0

ADDR1

SDC

READ_EN_N

ALL_DONE_N

SDA

GND

Float for I2C Target mode, or

connect to next device’s

READ_EN_N for I2C

Controller mode

I2C Target

mode

EN_SMB

Address straps (pull-up,

pull-down, or float)

1 k

To system

I2C

VDD_1V8 or 3.3V

CAL_CLK_IN

CAL_CLK_OUT

To next retimer’s

CAL_CLK_IN

INT_N

To system

controller

VDD1P8

1 F

(2x)

0.1 F

(4x)

VDD_1V2

RESET_N

1 F

(1x)

0.1 F

(2x)

VDD_1V8

25 MHz

0.1 F

VDD_1V8

RX0N

TX0N

RX0P

TX0P

TX1N

TX1P

RX1N

RX1P

Aggregator /

De-aggregator

CDR

CDR

RX6N

TX6N

RX6P

TX6P

TX7N

TX7P

RX7N

RX7P

Aggregator /

De-aggregator

CDR

CDR

Simplified Schematic

DS560DF810

SNLS709B – DECEMBER 2021 – REVISED JUNE 2023

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.