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PARAMETER MEASUREMENT INFORMATION

SDI

CLK

CS

LDAC

tCSS

tds

tdh

tch

tcl

tcsh

Input REG. LD

tlds

tLDAC

tLDH

A1

A0

D13 D12 D11 D10

D1

D0

DAC8802

SBAS351B – AUGUST 2005 – REVISED FEBRUARY 2007

ELECTRICAL CHARACTERISTICS (continued)

V

DD = 2.7 V to 5.5 V, IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B = 10 V, TA = full operating temperature range, unless

otherwise noted.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY CHARACTERISTICS

Power supply range

VDD RANGE

2.7

5.5

V

Logic inputs = 0 V, VDD = 4.5 V to 5.5 V

2

5

µA

Positive supply current

IDD

Logic inputs = 0 V, VDD = 2.7 V to 3.6 V

1

2.5

µA

Power dissipation

PDISS

Logic inputs = 0 V

0.0275

mW

Power supply sensitivity

PSS

∆V

DD = ±5%

0.006

%

AC CHARACTERISTICS(5)(6)

To

±0.1% of full-scale,

µs

0.3

Data = 0000h to 3FFFh to 0000h

Output voltage settling time

ts

To

±0.006% of full-scale,

µs

0.5

Data = 0000h to 3FFFh to 0000h

Reference multiplying BW

BW –3 dB

VREFX = 100 mVRMS, Data = 3FFFh, CFB = 3 pF

10

MHz

DAC glitch impulse

Q

VREFX = 10 V, Data = 1FFFh to 2000h to 1FFFh

5

nV/s

Feedthrough error

VOUTX/VREFX

Data = 0000h, VREFX = 100 mVRMS, f = 100 kHz

–70

dB

Data = 0000h, VREFB = 100 mVRMS,

dB

Crosstalk error

VOUTA/VREFB

–100

Adjacent channel, f = 100 kHz

Digital feedthrough

Q

CS = 1 and fCLK = 1 MHz

1

nV/s

Total harmonic distortion

THD

VREF = 5 VPP, Data = 3FFFh, f = 1 kHz

–105

dB

Output spot noise voltage

en

f = 1 kHz, BW = 1 Hz

12

nV/

√Hz

(5)

These parameters are specified by design and not subject to production testing.

(6)

All ac characteristic tests are performed in a closed-loop system using an THS4011 I-to-V converter amplifier.

Figure 1. DAC8802 Timing Diagram

4

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