ADS7891

SLAS410 − DECEMBER 2003

www.ti.com

7

Terminal Functions

PIN

NAME

I/O

DESCRIPTION

16−23,

DATA BUS

8 BIT BUS

16 BIT BUS

16−23,

26−31

BYTE =

0

1

0

16

DB13

O

D13 (MSB)

D5

D13 (MSB)

17

DB12

O

D12

D4

D12

18

DB11

O

D11

D3

D11

19

DB10

O

D10

D2

D10

20

DB9

O

D9

D1

D9

21

DB8

O

D8

D0 (LSB)

D8

22

DB7

O

D7

0

D7

23

DB6

O

D6

0

D6

26

DB5

O

D5

0

D5

27

DB4

O

D4

0

D4

28

DB3

O

D3

0

D3

29

DB2

O

D2

0

D2

30

DB1

O

D1

0

D1

31

DB0

O

D0 (LSB)

0

D0 (LSB)

36

BUSY

O

Status output. This pin is high when a conversion is in progress.

39

BYTE

I

Byte select input. Used for 8-bit bus reading.

0: No fold back.

1: Lower byte D[5:0] is folded back to high byte so D5 is available in D13 place.

40

CONVST

I

Conversion start. The rising edge starts the acquisition. The falling edge of this input ends the

acquisition and starts the conversion. Refer to the timing diagrams for more details.

41

RD

I

Active low synchronization pulse for the parallel output. When CS is low, this serves as the output

enable and puts the previous conversion results on the bus.

37

A_PWD

I

Nap mode enable, active low

24, 34

+VBD

Digital power supply for all digital inputs and outputs. Refer to Table 3 for layout guidelines.

25, 35

BDGND

Digital ground for all digital inputs and outputs. Needs to be shorted to analog ground plane below

the device.

42

CS

I

Chip Select. Active low signal enables chip operation like acquisition start, conversion start, bus

release from 3-state. Refer to the timing diagrams for more details.

38

PWD/RST

I

Active low input, acts as device power down/device reset signal.

5, 8, 11, 12, 14,

15, 44, 45

AGND

Analog ground pins. Need to be shorted to analog ground plane below the device.

4, 9, 10, 13, 43,

46

+VA

Analog power supplies. Refer to Table 3 for layout guidelines.

6

+IN

I

Non inverting analog input channel

7

−IN

I

Inverting analog input channel

1

REFIN

I

Reference (positive) input. Needs to be decoupled with REFM pin using 0.1-

µF bypass capacitor

and 1-

µF storage capacitor.

2

REFOUT

O

Internal reference output. To be shorted to REFIN pin when internal reference is used. Do not

connect to REFIN pin when external reference is used. Always needs to be decoupled with AGND

using 0.1-

µF bypass capacitor.

47, 48

REFM

I

Reference ground. To be connected to analog ground plane.

3, 32, 33

NC

No connection pins.