DAC7731

2

SBAS249B

www.ti.com

ABSOLUTE MAXIMUM RATINGS(1)

VCC to VSS ........................................................................... –0.3V to +32V

VCC to AGND ...................................................................... –0.3V to +16V

VSS to AGND ...................................................................... –16V to +0.3V

AGND to DGND ................................................................... –0.3V to 0.3V

REFIN to AGND .............................................................. 0V to VCC – 1.4V

VDD to DGND ........................................................................ –0.3V to +6V

Digital Input Voltage to DGND ................................. –0.3V to VDD + 0.3V

Digital Output Voltage to DGND .............................. –0.3V to VDD + 0.3V

Operating Temperature Range ........................................ –40

°C to +85°C

Storage Temperature Range ......................................... –65

°C to +150°C

Junction Temperature (TJ Max) .................................................... +150

°C

NOTE: (1) Stresses above those listed under Absolute Maximum Ratings may

cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru-

ments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may be

more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

PACKAGE/ORDERING INFORMATION(1)

SPECIFIED

PACKAGE

TEMPERATURE

PACKAGE

ORDERING

TRANSPORT

PRODUCT

PACKAGE-LEAD

DESIGNATOR

RANGE

MARKING

NUMBER(2)

MEDIA, QUANTITY

DAC7731E

SSOP-24

DB

–40

°C to +85°C

DAC7731E

DAC7731E

Rails, 60

""

"

"

"

DAC7731E/1K

Tape and Reel,1000

DAC7731EB

SSOP-24

DB

–40

°C to +85°C

DAC7731EB

DAC7731EB

Rails, 60

""

"

"

"

DAC7731EB/1K

Tape and Reel, 1000

DAC7731EC

SSOP-24

DB

–40

°C to +85°C

DAC7731EC

DAC7731EC

Rails, 60

""

"

"

"

DAC7731EC/1K

Tape and Reel, 1000

NOTE: (1) For the most current package ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI web site at www.ti.com.

Top View

SSOP

PIN CONFIGURATION

PIN

NAME

DESCRIPTION

1VCC

Positive Analog Power Supply

2

REFOUT

Internal Reference Output

3REFIN

Reference Input

4

REFADJ

Internal Reference Trim. (Acts as a gain adjustment

input when the internal reference is used.)

5VREF

Buffered Output from REFIN, can be used to drive

external devices. Internally, this pin directly drives the

DAC's circuitry.

6ROFFSET

Offsetting Resistor

7

AGND

Analog ground

8

RFB2

Feedback Resistor 2, used to configure DAC output

range.

9

RFB1

Feedback Resistor 1, used to configure DAC output

range.

10

SJ

Summing Junction of the Output Amplifier

11

VOUT

DAC Voltage Output

12

VDD

Digital Power Supply

13

DGND

Digital Ground

14

TEST

Reserved, Connect to DGND

15

NC

No Connection

16

RST

VOUT reset; active LOW, depending on the state of

RSTSEL, the DAC register is either reset to mid-

scale or min-scale.

17

LDAC

DAC register load control, rising dege triggered. Data

is loaded from the input register to the DAC register.

18

SDI

Serial Data Input. Data is latched into the input

register on the rising edge of SCLK.

19

SDO

Serial Data Output, delayed 16 SCLK clock cycles.

20

CS

Chip Select, Active LOW

21

SCLK

Serial Clock Input

22

RSTSEL

Reset Select; determines the action of RST. If HIGH,

RST will reset the DAC register to mid-scale. If LOW,

RST will reset the DAC register to min-scale.

23

REFEN

Enables internal +10V reference (REFOUT), active

LOW.

24

VSS

Negative Analog Power Supply

PIN DESCRIPTIONS

V

CC

REF

OUT

REF

IN

REFADJ

V

REF

R

OFFSET

AGND

RFB2

RFB1

SJ

V

OUT

V

DD

V

SS

REFEN

RSTSEL

SCLK

CS

SDO

SDI

LDAC

RST

NC

TEST

DGND

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

DAC7731

NOTE: RST, LDAC, SDI, CS and SCK are Schmitt-triggered inputs.