FN8861 Rev. 1.00

Page 5 of 28

Jul 27, 2017

ISL72026ASEH

1. Overview

1.2

Pin Configuration

1.4

Equivalent Input and Output Schematic Diagrams

ISL72026ASEH

(8 Ld Ceramic Flatpack)

Top View

1.3

Pin Descriptions

Pin

Number

Pin

Name

Function

1

D

CAN driver digital input. A Low bus state is Dominant and a High bus state is Recessive. Internally tied High.

2

GND

Ground connection.

3

VCC

System power supply input (3.0V to 3.6V). The typical voltage for the device is 3.3V.

4

R

CAN Data Receiver Output. A Low bus state is Dominant and a High bus state is Recessive.

5

LBK

A HIGH on this pin places the CANH and CANL pins in a high impedance state. The rest of the circuit remains

active so that the TX and RX can loopback diagnostic information. Internally tied LOW.

6

CANL

CAN bus line for low level output.

7

CANH

CAN bus line for high level output.

8

RS

A resistor to GND from this pin controls the rise and fall time of the CAN output waveform. Drive RS HIGH to put

the device into Listen mode.

Figure 3. CANH and CANL Inputs

Figure 4. CANH Output

Figure 5. CANL Output

D

GND

VCC

R

RS

CANH

CANL

LBK

8

7

6

5

2

3

4

1

Note: The package lid is

tied to ground.

VCC

30V

INPUT

GND

2k

7k

4k

35k

VCC

30V

OUTPUT

GND

30V

OUTPUT

GND