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BQ2012 датащи(PDF) 12 Page - Texas Instruments

номер детали BQ2012
подробное описание детали  Gas Gauge IC With Slow-Charge Control
PDF  26 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

BQ2012 датащи(HTML) 12 Page - Texas Instruments

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The battery removed flag (BRM) is asserted whenever
the potential on the SB pin (relative to VSS) rises above
MCV or falls below 0.1V. The BRM flag is asserted until
the condition causing BRM is removed.
The BRM values are:
Where BRM is:
0
0.1V < VSB < 2.25V
1
0.1 V > VSB or VSB > 2.25V
The capacity inaccurate flag (CI) is used to warn the
user that the battery has been charged a substantial
number of times since LMD has been updated. The CI
flag is asserted on the 64th charge after the last LMD
update or when the bq2012 is reset. The flag is cleared
after an LMD update.
The CI values are:
Where CI is:
0
When LMD is updated with a valid full dis-
charge
1
After the 64th valid charge action with no
LMD updates
The valid discharge flag (VDQ) is asserted when the
bq2012 is discharged from NAC = LMD. The flag re-
mains set until either LMD is updated or one of three
actions that can clear VDQ occurs:
I
The self-discharge count register (SDCR) has
exceeded the maximum acceptable value (4096
counts) for an LMD update.
I
A valid charge action sustained at VSRO >VSRQ for at
least 256 NAC counts.
I
The EDV1 flag was set at a temperature below 0°C
The VDQ values are:
Where VDQ is:
0
SDCR
≥ 4096, subsequent valid charge ac-
tion detected, or EDV1 is asserted with the
temperature less than 0°C
1
On first discharge after NAC = LMD
The charge control flag, CHG, is asserted whenever
the CHG pin is asserted (see the charge control section
on page 7 for a description of the CHG pin function).
The CHG values are:
Where CHG is:
0
When the CHG pin is asserted active low,
signifying that the bq2012 is in a state to
allow charge activity.
1
When the CHG pin is high-impedance, sig-
nifying that no charge activity should take
place.
The first end-of-discharge warning flag (EDV1)
warns the user that the battery is almost empty. The
first segment pin, SEG1, is modulated at a 4Hz rate if
the display is enabled once EDV1 is asserted, which
should warn the user that loss of battery power is immi-
nent. The EDV1 flag is latched until a valid charge has
been detected.
The EDV1 values are:
Where EDV1 is:
0
Valid charge action detected, VSB
≥ 1.05V
1VSB < 1.05V providing that OVLD=0 (see
FLGS2 register description)
The final end-of-discharge warning flag (EDVF) flag
is used to warn that battery power is at a failure condi-
tion. All segment drivers are turned off. The EDVF flag
is latched until a valid charge has been detected. The
EMPTY pin is also forced to a high-impedance state on
assertion of EDV1. The host system may pull EMPTY
high, which may be used to disable circuitry to prevent
deep-discharge of the battery.
12
bq2012
FLGS1 Bits
76
5
4
3
2
1
0
-
-
-
-
-
CHG
--
FLGS1 Bits
76
5
4
3
2
1
0
-
-
-
-
VDQ
-
-
-
FLGS1 Bits
76
5
4
3
2
1
0
-
-
-
-
-
-
EDV1
-
FLGS1 Bits
76
5
4
3
2
1
0
--
-
CI
-
-
-
-
FLGS1 Bits
76
5
4
3
2
1
0
-
-
BRM
-
-
-
-
-



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