TC9256, 57APG/AFG

2006-07-14

16

(3) Output register ......................... The data set in bits O1 to O4 of the input register can be read as serial

data O1 to O4 from the output register (D3H).

2.

General-Purpose I/O Ports (I/O-5 to I/O-9)

Pins I/O-5 to I/O-9 are general-purpose I/O ports used for control signal input and output. They are

configured for CMOS input and output.

These I/O ports are set for input or output using bits C5, C6 and M7 to M9 of the input register (D2H).

Setting bits C5, C6 and M7 to M9 to “0” sets these ports for input. Data input in parallel from I/O-5to

I/O-9 are latched in the internal register at the ninth falling edge of the serial clock signal. The data can

then be read as serial data I5 to I9 from the DATA pins.

Setting bits C5, C6 and M7 to M9 to “1” sets these ports for output.

Data set in bits O5 to O9 of the input register (D2H) is output in parallel from their corresponding

general-purpose I/O port pins I/O-5 to I/O-9.

These operations are valid when bits SC, IF1, IF2 and CLK are all set to “0”.

(1)

TC9257APG and TC9257AFG

• Setting data for output ports

Note1:

On TC9257APG and TC9257AFG, pins I/O-7to I/O-9 also serve as general-purpose counter

input pins. Therefore, bits SC, IF1 and IF2 of the input register (D2H) must be set to “0” when

pins I/O-7to I/O-9 are used for I/O ports. Since pin I/O-5 also serves as the CLK pin, the CLK

bit of the input register (D2H) must be set to “0” when pin I/O-5 is used as an I/O port.

Note2:

Bit names in parentheses “(

)” apply to the TC9256APG and TC9256AFG.

Note3:

Bits marked with (*1) cannot be set on the TC9256APG and TC9256AFG.