ADRV9002 datasheet(92/100 Pages) AD

92 / 100 page

Data Sheet

ADRV9002

THEORY OF OPERATION

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Rev. A | 92 of 100

The ADRV9002 is a highly integrated RF transceiver that can be

configured for a wide range of applications. The device integrates

all RF, mixed-signal, and digital blocks necessary to provide trans-

mit and receive functions in a single device. Programmability allows

the two receiver channels and two transmitter channels to be used

in TDD and FDD systems for mobile radio and cellular standards.

The ADRV9002 contains serial interface links that consist of LVDS

and a CMOS synchronous serial interface (CSSI). Both receiver

and transmitter channels provide a low pin count and reliable

data interface to a field-programmable gate array (FPGA) or other

integrated baseband solutions.

The ADRV9002 provides self calibration for dc offset, LO leakage,

and QEC using an integrated microcontroller core to maintain a

high performance level under varying temperatures and input signal

conditions. Firmware is supplied with the device to schedule all

calibrations with no user interaction.

TRANSMITTER

The ADRV9002 uses a direct conversion transmitter architecture

that consists of two identical and independently controlled channels

that provide all digital processing, mixed signals, PLLs, and RF

blocks necessary to implement a direct conversion system. Refer to

Figure 360 for the transmitter data path overview.

The ADRV9002 has an optional, fully programmable, 128-tap FIR.

The FIR output is sent to a series of interpolation filters that provide

additional filtering and data rate interpolation prior to reaching the

DAC. Each DAC has an adjustable sample rate and is linear up to

full scale.

The DAC output produces baseband analog signals. The I and

Q signals are first filtered to remove sampling artifacts and then

fed to the upconversion mixers. At the mixer stage, the I and Q

signals are recombined and modulated onto the carrier frequency

for transmission to the output stage. Each transmit chain provides

a wide attenuation adjustment range with fine granularity to help

designers optimize the signal-to-noise ratio (SNR).

Figure 360. Transmitter Architecture

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