VFC110

SBVS021A − OCTOBER 1988 − REVISED APRIL 2007

www.ti.com

2

ABSOLUTE MAXIMUM RATINGS(1)

Power Supply Voltages (+VS to −VS)

40V

. . . . . . . . . . . . . . . . . . . . .

fOUT Sink Current

50mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Comparator In Voltage

−5V to +VS

. . . . . . . . . . . . . . . . . . . . . . . . . .

Enable Input

+VS to −VS

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Integrator Common-Mode Voltage

−1.5V to +1.5V

. . . . . . . . . . . . .

Integrator Differential Input Voltage

+0.5V to −0.5V

. . . . . . . . . . . . .

Integrator Out (short-circuit)

Indefinite

. . . . . . . . . . . . . . . . . . . . . . .

VREF Out (short-circuit)

Indefinite

. . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Temperature Range

P Package

−40

°C to +85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature

P Package

−40

°C to +125°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods

may degrade device reliability. These are stress ratings only, and

functional operation of the device at these or any other conditions

beyond those specified is not supported.

This integrated circuit can be damaged by ESD. Texas

Instruments recommends that all integrated circuits be

handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could

cause the device not to meet its published specifications.

ORDERING INFORMATION(1)

PRODUCT

PACKAGE-LEAD

PACKAGE DESIGNATOR

SPECIFIED TEMPERATURE

RANGE

VFC110AP

14-Pin Plastic DIP

N

−25

°C to +85°C

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site

at www.ti.com.

PIN CONFIGURATION

Top View

P-DIP

Input Common

Analog Common

V

OUT

Comparator In

+V

S

NC

f

OUT

Enable

Digital Ground

1

2

3

4

5

6

7

14

13

12

11

10

9

8

I

IN

V

IN

+5V

REF Out

−V

S

C

OS