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ST7MDT10-EMU3 датащи(PDF) 35 Page - STMicroelectronics

номер детали ST7MDT10-EMU3
подробное описание детали  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, timers, SPI
PDF  124 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7MDT10-EMU3 датащи(HTML) 35 Page - STMicroelectronics

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SYSTEM INTEGRITY MANAGEMENT (Cont’d)
8.4.3 Low Power Modes
8.4.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the corresponding Enable Control Bit (AVDIE) is
set and the interrupt mask in the CC register is re-
set (RIM instruction).
Mode
Description
WAIT
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
HALT
The SICSR register is frozen.
The AVD remains active but the AVD inter-
rupt cannot be used to exit from Halt mode.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
AVD event
AVDF
AVDIE
Yes
No
1



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